III-V nano-scale MOSFETs - 29/10/15

You are invited to attend a lecture

By:

 Alon Vardi

MIT – Massachusetts Institute of Technology

alonva@mit.edu.ac.il

 III-V nano-scale MOSFETs

InGaAs has emerged as the most promising n-channel material for sub-10 nm CMOS. In this dimensional range, only high aspect-ratio 3D transistors with a fin or nanowire configuration can deliver the necessary performance. To demonstrate these types of advanced devices, we are investigating top-down fabrication techniques. There are many challenges to overcome before such devices could advance the state of art. Some of these are: obtaining Nano-scale contacts, developing high aspect-ratio semiconductor structures with vertical sidewalls, curing etch damage, and obtaining a high quality sidewall MOS interface.

In this talk, I will present key technologies developed in our lab, and their application mainly to InGaAs FinFETs. Using this technology, we have obtained record nanoscale contacts, and demonstrated for the first time III-V FinFETs with sub 10 nm fin width.

 Thursday, October 29, 2015, at 15:00

 Room 011, Kitot building